4.
-
library ieee;
use ieee.std_logic_1164.all;
entity pilav is
su_bardagı_pirinc = x;
su_bardagı_su = y;
variable x : std_logic_vector(2 downto 0):="000";
variable y : std_logic_vector(2 downto 0):="000";
end entity;
architecture pilav_yapimi of pilav is
begin
process(x,y)
y=2x
end process;
end pilav_yapimi;
Not : O kadar anlattık afiyet olsun.
